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Wireless clock synchronization convergence algorithm based on the phase-locked loop principle

  • Xinsheng Wang
  • , Zhenyu Ma
  • , Wencong Fan
  • , Xiyue Wang*
  • *Corresponding author for this work
  • School of Information Science and Engineering, Harbin Institute of Technology Weihai

Research output: Contribution to journalArticlepeer-review

Abstract

Clock synchronization is a fundamental service for information and communication systems and is widely required in particle physics experiments, unmanned aerial vehicle swarms, and modern vehicle systems. To address the demand for high-precision and low-cost clock synchronization in large-scale wireless sensor arrays, this study proposes a wireless clock synchronization scheme based on phase-locked loop principles to achieve frequency and phase locking between master and slave clocks. A fuzzy control algorithm is introduced to accelerate synchronization convergence. Simulation results show that the proposed algorithm improves the convergence rate by 20% compared with the conventional proportional-integral control algorithm, and significantly improves the overshoot behavior. Using ultra-wideband as the communication carrier, the MCU is responsible for control scheduling, while the field-programmable gate array performs phase measurement, filtering, and clock-control-related algorithm processing. Experimental results confirm that the proposed scheme achieves nanosecond-level synchronization precision (±5 ns). This work provides a high-precision and low-cost solution for large-scale wireless clock synchronization.

Original languageEnglish
Article number275107
JournalMeasurement Science and Technology
Volume37
Issue number27
DOIs
StatePublished - Jul 2026
Externally publishedYes

Keywords

  • PLL
  • UWB
  • clock synchronization
  • fuzzy control
  • wireless synchronization

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