Abstract
Gate oxide failure of power VDMOSFET has been researched for a long time. For BTI parameter degradation, some models are proposed. However, the degradation modelling of HEF still have challenges, one of which is the turn-around phenomenon. Due to the existence of the turn-around point, the threshold voltage degradation model under HEF cannot be described using classical models. Aiming at this problem, the experimental study and the argument are proposed in this paper. First, the theoretical model assumption is discussed based on the degradation mechanism. Second, the HEF stress experiments are carried out to acquire experimental data. Then the model fitting is processed. A three-phase model is proposed to describe threshold voltage degradation under HEF stress.
| Original language | English |
|---|---|
| Pages (from-to) | 37-41 |
| Number of pages | 5 |
| Journal | Microelectronics Reliability |
| Volume | 80 |
| DOIs | |
| State | Published - Jan 2018 |
Keywords
- Degradation model
- High electric field
- Power VDMOSFET
- Turn-around phenomenon
Fingerprint
Dive into the research topics of 'VDMOSFET HEF degradation modelling considering turn-around phenomenon'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver