Transient fault representativenesses comparison analysis

Lin Chen; Chao Wang; Yan Wang; Jie Xiang Kang; Bin Zha; Sheng Yi Zhao; Bin Li; Zhong Chuan Fu; Yu Ying Wang; Gang Cui

doi:10.1109/ITAP.2011.6006140

Transient fault representativenesses comparison analysis

Lin Chen^*
, Chao Wang
, Yan Wang
, Jie Xiang Kang
, Bin Zha
, Sheng Yi Zhao
, Bin Li
, Zhong Chuan Fu
, Yu Ying Wang
, Gang Cui

^*Corresponding author for this work

Faculty of Computing

Harbin Institute of Technology
China National Aeronautical Radio Electronics Research Institute

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

As semiconductor technology scales into deep submicron regime, transient fault vulnerability of both combinational logic and sequential logic increase rapidly. It is predicted that in 2011 transient fault rate of combinational logic will overtake that of sequential logic in processor. In this paper, particle radiation-induced multi-bit transient faults in Decoder unit, representative combinational logic components in SPARC processor, are simulated under different fault injection method, namely simulation-based fault injection and compilation supported static fault injection respectively. Fault representativenesses observed in both fault injection experiments are analyzed, and the inaccuracy factors of the static error injection method are put forward.

Original language	English
Title of host publication	2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings
DOIs	https://doi.org/10.1109/ITAP.2011.6006140
State	Published - 2011
Event	2011 International Conference on Internet Technology and Applications, iTAP 2011 - Wuhan, China Duration: 16 Aug 2011 → 18 Aug 2011

Publication series

Name	2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings

Conference

Conference	2011 International Conference on Internet Technology and Applications, iTAP 2011
Country/Territory	China
City	Wuhan
Period	16/08/11 → 18/08/11

Keywords

Combinational logic
Fault injection
Multi-bit transient fault

Access to Document

10.1109/ITAP.2011.6006140

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Chen, L., Wang, C., Wang, Y., Kang, J. X., Zha, B., Zhao, S. Y., Li, B., Fu, Z. C., Wang, Y. Y., & Cui, G. (2011). Transient fault representativenesses comparison analysis. In 2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings Article 6006140 (2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings). https://doi.org/10.1109/ITAP.2011.6006140

@inproceedings{5c9dafe897aa453daac7d77a68b196dd,

title = "Transient fault representativenesses comparison analysis",

abstract = "As semiconductor technology scales into deep submicron regime, transient fault vulnerability of both combinational logic and sequential logic increase rapidly. It is predicted that in 2011 transient fault rate of combinational logic will overtake that of sequential logic in processor. In this paper, particle radiation-induced multi-bit transient faults in Decoder unit, representative combinational logic components in SPARC processor, are simulated under different fault injection method, namely simulation-based fault injection and compilation supported static fault injection respectively. Fault representativenesses observed in both fault injection experiments are analyzed, and the inaccuracy factors of the static error injection method are put forward.",

keywords = "Combinational logic, Fault injection, Multi-bit transient fault",

author = "Lin Chen and Chao Wang and Yan Wang and Kang, \{Jie Xiang\} and Bin Zha and Zhao, \{Sheng Yi\} and Bin Li and Fu, \{Zhong Chuan\} and Wang, \{Yu Ying\} and Gang Cui",

year = "2011",

doi = "10.1109/ITAP.2011.6006140",

language = "英语",

isbn = "9781424472550",

series = "2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings",

booktitle = "2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings",

note = "2011 International Conference on Internet Technology and Applications, iTAP 2011 ; Conference date: 16-08-2011 Through 18-08-2011",

}

Chen, L, Wang, C, Wang, Y, Kang, JX, Zha, B, Zhao, SY, Li, B, Fu, ZC, Wang, YY & Cui, G 2011, Transient fault representativenesses comparison analysis. in 2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings., 6006140, 2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings, 2011 International Conference on Internet Technology and Applications, iTAP 2011, Wuhan, China, 16/08/11. https://doi.org/10.1109/ITAP.2011.6006140

Transient fault representativenesses comparison analysis. / Chen, Lin; Wang, Chao; Wang, Yan et al.
2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings. 2011. 6006140 (2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Transient fault representativenesses comparison analysis

AU - Chen, Lin

AU - Wang, Chao

AU - Wang, Yan

AU - Kang, Jie Xiang

AU - Zha, Bin

AU - Zhao, Sheng Yi

AU - Li, Bin

AU - Fu, Zhong Chuan

AU - Wang, Yu Ying

AU - Cui, Gang

PY - 2011

Y1 - 2011

N2 - As semiconductor technology scales into deep submicron regime, transient fault vulnerability of both combinational logic and sequential logic increase rapidly. It is predicted that in 2011 transient fault rate of combinational logic will overtake that of sequential logic in processor. In this paper, particle radiation-induced multi-bit transient faults in Decoder unit, representative combinational logic components in SPARC processor, are simulated under different fault injection method, namely simulation-based fault injection and compilation supported static fault injection respectively. Fault representativenesses observed in both fault injection experiments are analyzed, and the inaccuracy factors of the static error injection method are put forward.

AB - As semiconductor technology scales into deep submicron regime, transient fault vulnerability of both combinational logic and sequential logic increase rapidly. It is predicted that in 2011 transient fault rate of combinational logic will overtake that of sequential logic in processor. In this paper, particle radiation-induced multi-bit transient faults in Decoder unit, representative combinational logic components in SPARC processor, are simulated under different fault injection method, namely simulation-based fault injection and compilation supported static fault injection respectively. Fault representativenesses observed in both fault injection experiments are analyzed, and the inaccuracy factors of the static error injection method are put forward.

KW - Combinational logic

KW - Fault injection

KW - Multi-bit transient fault

UR - https://www.scopus.com/pages/publications/80052832434

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DO - 10.1109/ITAP.2011.6006140

M3 - 会议稿件

AN - SCOPUS:80052832434

SN - 9781424472550

T3 - 2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings

BT - 2011 International Conference on Internet Technology and Applications, iTAP 2011 - Proceedings

T2 - 2011 International Conference on Internet Technology and Applications, iTAP 2011

Y2 - 16 August 2011 through 18 August 2011

ER -

Transient fault representativenesses comparison analysis

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