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The design of the integrator of sigma-delta modulator

  • Xiaowei Liu
  • , Song Chen*
  • , Liang Liu
  • , Jian Yang
  • , Weiping Chen
  • *Corresponding author for this work
  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A kind of fully differential integrator is designed for the modulator of Sigma-delta ADC in this paper. Fully differential structure is adopted to enlarge the amplitude of output, restrain nonlinearity and increase competence of anti-interference. The frequency of signal in this design is 10kHz and the frequency of clock signal is 100kHz. The design of fully differential integrator, capacitive common mode feedback, two-phase unoverlapping clock and switched capacitor integrator are accomplished in this paper. The simulation results in Cadence using 0.5um process show that the low-frequency gain of operational amplifier is 69.87dB, unity gain bandwidth is 37.74MHz, phase margin is 67.73 degrees and slew rate is more than 31V/μs.

Original languageEnglish
Title of host publicationMicro-Nano Technology XIV
PublisherTrans Tech Publications Ltd
Pages477-481
Number of pages5
ISBN (Print)9783037857397
DOIs
StatePublished - 2013
Event14th Annual Conference and the 3rd International Conference of the Chinese Society of Micro-Nano Technology, CSMNT 2012 - Hangzhou, China
Duration: 4 Nov 20127 Nov 2012

Publication series

NameKey Engineering Materials
Volume562-565
ISSN (Print)1013-9826
ISSN (Electronic)1662-9795

Conference

Conference14th Annual Conference and the 3rd International Conference of the Chinese Society of Micro-Nano Technology, CSMNT 2012
Country/TerritoryChina
CityHangzhou
Period4/11/127/11/12

Keywords

  • Fully differential integrator
  • Sigma-delta modulator
  • Two-phase unoverlapping clock

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