TY - GEN
T1 - The design of SVPWM IP core based on FPGA
AU - Yang, Guijie
AU - Zhao, Pinzhi
AU - Zhou, Zhaoyong
PY - 2008
Y1 - 2008
N2 - This paper expounds the basic principle of SVPWM from the perspective of vector analysis, and derives the necessary mathematical formula to implement this digital design. Also, this paper presents a basic structure of the digital hardware circuit based on FPGA. The proposed scheme is implemented and verified on a single Altera FPGA. The experimental results are presented in the end and show that the approach of digital SVPWM based on FPGA is feasible and can all achieve expected performances.
AB - This paper expounds the basic principle of SVPWM from the perspective of vector analysis, and derives the necessary mathematical formula to implement this digital design. Also, this paper presents a basic structure of the digital hardware circuit based on FPGA. The proposed scheme is implemented and verified on a single Altera FPGA. The experimental results are presented in the end and show that the approach of digital SVPWM based on FPGA is feasible and can all achieve expected performances.
UR - https://www.scopus.com/pages/publications/55349146957
U2 - 10.1109/ICESS.Symposia.2008.67
DO - 10.1109/ICESS.Symposia.2008.67
M3 - 会议稿件
AN - SCOPUS:55349146957
SN - 9780769532882
T3 - Proceedings - The 2008 International Conference on Embedded Software and Systems Symposia, ICESS Symposia
SP - 191
EP - 196
BT - Proceedings - The 2008 International Conference on Embedded Software and Systems Symposia, ICESS2008
T2 - 2008 International Conference on Embedded Software and Systems Symposia, ICESS2008
Y2 - 29 July 2008 through 31 July 2008
ER -