The design of an adaptive on-board computer for small satellites

Two of the most important aspects of on-board computers (OBCs) for small satellite designs are miniaturization and functional integration. Toward that objective, this thesis proposed a noble reconfigurable OBC hardware architecture and a method of FPGA resource scheduling. Based on the method, a real time operating system was also designed, which make the OBC could dynamically adapt its hardware architecture to meet the demand of software tasks. This design allows for highly efficient multi-tasking and autonomous architecture modification. The FPGA resource utilizing method and adaptable architecture also gave the OBC a certain degree of in-flight self-repair capability which improves prospects for long term reliability in space. At last, a prototype was implemented on a Xilinx's ML403 development board, and details of the design and the test results were described in this paper.