Temperature Effects of Program Operation in 3-D nand Flash Memory: Observations, Analysis, and Solutions

As flash memory storage density continues to increase, it has become the mainstream storage medium for electronic devices. Writing data in low-temperature environment causes distortions in the flash memory threshold voltage distribution (TVD), which spikes the raw bit error rate and ultimately leads to degradation of the performance of flash-based electronic devices. To ameliorate the reliability problem caused by flash memory read and program temperature variations, this study proposes a flash memory programming temperature compensation algorithm based on read reference voltage (PTC-RRV) calibration. 3-D triple-level cell (TLC) flash memory is currently the mainstream storage medium for consumer electronics. Based on a large number of real tests on this type of chips, the relationship between the programming/reading temperature and the TVD of flash memory is fully characterized, and a programming temperature compensation model is constructed. The model evaluation results show that the PTC-RRV strategy can significantly reduce the average number of read-retry of low temperature written data and effectively improve the storage reliability and read performance of flash memory, whose optimization effect on electronic devices is better than the existing temperature compensation algorithms.