Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit

Linzhe Li; Liyi Xiao; Jie Li; He Liu; Zhigang Mao

doi:10.1109/ASICON47005.2019.8983690

Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit

Linzhe Li
, Liyi Xiao
, Jie Li
, He Liu
, Zhigang Mao

School of Astronautics

Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.

Original language	English
Title of host publication	Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019
Editors	Fan Ye, Ting-Ao Tang
Publisher	IEEE Computer Society
ISBN (Electronic)	9781728107356
DOIs	https://doi.org/10.1109/ASICON47005.2019.8983690
State	Published - Oct 2019
Event	13th IEEE International Conference on ASIC, ASICON 2019 - Chongqing, China Duration: 29 Oct 2019 → 1 Nov 2019

Publication series

Name	Proceedings of International Conference on ASIC
ISSN (Print)	2162-7541
ISSN (Electronic)	2162-755X

Conference

Conference	13th IEEE International Conference on ASIC, ASICON 2019
Country/Territory	China
City	Chongqing
Period	29/10/19 → 1/11/19

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10.1109/ASICON47005.2019.8983690

Cite this

Li, L., Xiao, L., Li, J., Liu, H., & Mao, Z. (2019). Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit. In F. Ye, & T.-A. Tang (Eds.), Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019 Article 8983690 (Proceedings of International Conference on ASIC). IEEE Computer Society. https://doi.org/10.1109/ASICON47005.2019.8983690

@inproceedings{408b7e8964ae43db8a8f8a8c797d97d9,

title = "Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit",

abstract = "With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.",

author = "Linzhe Li and Liyi Xiao and Jie Li and He Liu and Zhigang Mao",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 13th IEEE International Conference on ASIC, ASICON 2019 ; Conference date: 29-10-2019 Through 01-11-2019",

year = "2019",

month = oct,

doi = "10.1109/ASICON47005.2019.8983690",

language = "英语",

series = "Proceedings of International Conference on ASIC",

publisher = "IEEE Computer Society",

editor = "Fan Ye and Ting-Ao Tang",

booktitle = "Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019",

address = "美国",

}

Li, L, Xiao, L, Li, J, Liu, H & Mao, Z 2019, Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit. in F Ye & T-A Tang (eds), Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019., 8983690, Proceedings of International Conference on ASIC, IEEE Computer Society, 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, 29/10/19. https://doi.org/10.1109/ASICON47005.2019.8983690

Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit. / Li, Linzhe; Xiao, Liyi; Li, Jie et al.
Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019. ed. / Fan Ye; Ting-Ao Tang. IEEE Computer Society, 2019. 8983690 (Proceedings of International Conference on ASIC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit

AU - Li, Linzhe

AU - Xiao, Liyi

AU - Li, Jie

AU - Liu, He

AU - Mao, Zhigang

PY - 2019/10

Y1 - 2019/10

N2 - With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.

AB - With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.

UR - https://www.scopus.com/pages/publications/85082607558

U2 - 10.1109/ASICON47005.2019.8983690

DO - 10.1109/ASICON47005.2019.8983690

M3 - 会议稿件

AN - SCOPUS:85082607558

T3 - Proceedings of International Conference on ASIC

BT - Proceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019

A2 - Ye, Fan

A2 - Tang, Ting-Ao

PB - IEEE Computer Society

T2 - 13th IEEE International Conference on ASIC, ASICON 2019

Y2 - 29 October 2019 through 1 November 2019

ER -

Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit

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