Suppression of gate oscillation of power MOSFET with bridge topology

Wu Fengjiang; Gao Hanying; Sun Li; Zhao Ke

doi:10.1109/WCICA.2006.1713572

Suppression of gate oscillation of power MOSFET with bridge topology

Wu Fengjiang^*
, Gao Hanying
, Sun Li
, Zhao Ke

^*Corresponding author for this work

School of Electrical Engineering and Automation

Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

In order to suppress the oscillation of gate drive signal of the power MOSFET, a equivalent circuit model of the half-bridge inverter considering stray parameters of the drive circuit is put forward based on the equivalent model of the power MOSFET considering junction capacitances, based on which It is known that the oscillation is caused by the high dv/dt produced during the power MOSFET switching and junction capacitances and distributed inductance. The drive circuit parameters are devised optimally according to the transient timing domain three-dimensional curves of parameters corresponding to the oscillation. The oscillation is suppressed obviously through increasing turn-on time of the power MOSFET, and experimental results are given. Both the theoretic analysis and experimental results indicate that the Improved circuit can meet the power MOSFET drive requirement perfectly.

Original language	English
Title of host publication	Proceedings of the World Congress on Intelligent Control and Automation (WCICA)
Pages	8196-8200
Number of pages	5
DOIs	https://doi.org/10.1109/WCICA.2006.1713572
State	Published - 2006
Event	6th World Congress on Intelligent Control and Automation, WCICA 2006 - Dalian, China Duration: 21 Jun 2006 → 23 Jun 2006

Publication series

Name	Proceedings of the World Congress on Intelligent Control and Automation (WCICA)
Volume	2

Conference

Conference	6th World Congress on Intelligent Control and Automation, WCICA 2006
Country/Territory	China
City	Dalian
Period	21/06/06 → 23/06/06

Keywords

Half bridge
Oscillation
Power MOSFET
Snubber circuit

Access to Document

10.1109/WCICA.2006.1713572

Cite this

Fengjiang, W., Hanying, G., Li, S., & Ke, Z. (2006). Suppression of gate oscillation of power MOSFET with bridge topology. In Proceedings of the World Congress on Intelligent Control and Automation (WCICA) (pp. 8196-8200). Article 1713572 (Proceedings of the World Congress on Intelligent Control and Automation (WCICA); Vol. 2). https://doi.org/10.1109/WCICA.2006.1713572

@inproceedings{c6cec9fd4f784524a024101de8dea99b,

title = "Suppression of gate oscillation of power MOSFET with bridge topology",

abstract = "In order to suppress the oscillation of gate drive signal of the power MOSFET, a equivalent circuit model of the half-bridge inverter considering stray parameters of the drive circuit is put forward based on the equivalent model of the power MOSFET considering junction capacitances, based on which It is known that the oscillation is caused by the high dv/dt produced during the power MOSFET switching and junction capacitances and distributed inductance. The drive circuit parameters are devised optimally according to the transient timing domain three-dimensional curves of parameters corresponding to the oscillation. The oscillation is suppressed obviously through increasing turn-on time of the power MOSFET, and experimental results are given. Both the theoretic analysis and experimental results indicate that the Improved circuit can meet the power MOSFET drive requirement perfectly.",

keywords = "Half bridge, Oscillation, Power MOSFET, Snubber circuit",

author = "Wu Fengjiang and Gao Hanying and Sun Li and Zhao Ke",

year = "2006",

doi = "10.1109/WCICA.2006.1713572",

language = "英语",

isbn = "1424403324",

series = "Proceedings of the World Congress on Intelligent Control and Automation (WCICA)",

pages = "8196--8200",

booktitle = "Proceedings of the World Congress on Intelligent Control and Automation (WCICA)",

note = "6th World Congress on Intelligent Control and Automation, WCICA 2006 ; Conference date: 21-06-2006 Through 23-06-2006",

}

Fengjiang, W, Hanying, G, Li, S & Ke, Z 2006, Suppression of gate oscillation of power MOSFET with bridge topology. in Proceedings of the World Congress on Intelligent Control and Automation (WCICA)., 1713572, Proceedings of the World Congress on Intelligent Control and Automation (WCICA), vol. 2, pp. 8196-8200, 6th World Congress on Intelligent Control and Automation, WCICA 2006, Dalian, China, 21/06/06. https://doi.org/10.1109/WCICA.2006.1713572

Suppression of gate oscillation of power MOSFET with bridge topology. / Fengjiang, Wu; Hanying, Gao; Li, Sun et al.
Proceedings of the World Congress on Intelligent Control and Automation (WCICA). 2006. p. 8196-8200 1713572 (Proceedings of the World Congress on Intelligent Control and Automation (WCICA); Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Suppression of gate oscillation of power MOSFET with bridge topology

AU - Fengjiang, Wu

AU - Hanying, Gao

AU - Li, Sun

AU - Ke, Zhao

PY - 2006

Y1 - 2006

N2 - In order to suppress the oscillation of gate drive signal of the power MOSFET, a equivalent circuit model of the half-bridge inverter considering stray parameters of the drive circuit is put forward based on the equivalent model of the power MOSFET considering junction capacitances, based on which It is known that the oscillation is caused by the high dv/dt produced during the power MOSFET switching and junction capacitances and distributed inductance. The drive circuit parameters are devised optimally according to the transient timing domain three-dimensional curves of parameters corresponding to the oscillation. The oscillation is suppressed obviously through increasing turn-on time of the power MOSFET, and experimental results are given. Both the theoretic analysis and experimental results indicate that the Improved circuit can meet the power MOSFET drive requirement perfectly.

AB - In order to suppress the oscillation of gate drive signal of the power MOSFET, a equivalent circuit model of the half-bridge inverter considering stray parameters of the drive circuit is put forward based on the equivalent model of the power MOSFET considering junction capacitances, based on which It is known that the oscillation is caused by the high dv/dt produced during the power MOSFET switching and junction capacitances and distributed inductance. The drive circuit parameters are devised optimally according to the transient timing domain three-dimensional curves of parameters corresponding to the oscillation. The oscillation is suppressed obviously through increasing turn-on time of the power MOSFET, and experimental results are given. Both the theoretic analysis and experimental results indicate that the Improved circuit can meet the power MOSFET drive requirement perfectly.

KW - Half bridge

KW - Oscillation

KW - Power MOSFET

KW - Snubber circuit

UR - https://www.scopus.com/pages/publications/34047207584

U2 - 10.1109/WCICA.2006.1713572

DO - 10.1109/WCICA.2006.1713572

M3 - 会议稿件

AN - SCOPUS:34047207584

SN - 1424403324

SN - 9781424403325

T3 - Proceedings of the World Congress on Intelligent Control and Automation (WCICA)

SP - 8196

EP - 8200

BT - Proceedings of the World Congress on Intelligent Control and Automation (WCICA)

T2 - 6th World Congress on Intelligent Control and Automation, WCICA 2006

Y2 - 21 June 2006 through 23 June 2006

ER -

Suppression of gate oscillation of power MOSFET with bridge topology

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this