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Study of no-dead-time control strategy in selective harmonic elimination inverter

  • Wen Yi Zhang*
  • , Wei Ming Tong
  • , Le Min Yang
  • , Hui Ming Xu
  • *Corresponding author for this work
  • School of Electrical Engineering and Automation, Harbin Institute of Technology
  • Harbin Institute of Technology

Research output: Contribution to journalArticlepeer-review

Abstract

Selective harmonic elimination inverter can eliminate harmonic effectively in theory, but dead-time increases the harmonic component in output voltage. Based on its operating principle, effect of dead-time on output voltage of inductive load is investigated. Working processes are analyzed on advance-off dead-time manner, lag-on dead-time manner and symmetry dead-time manner, their waveform figures and output harmonics amplitude equations are obtained accordingly. No-dead-time control strategy applied in selective harmonic elimination inverter is presented and the conditions for realizing no-dead-time control are analyzed. Applying no-dead-time control strategy in selective harmonic elimination inverter may eliminate bad influence of dead-time on output voltage.

Original languageEnglish
Pages (from-to)13-17
Number of pages5
JournalDianli Zidonghua Shebei/Electric Power Automation Equipment
Volume26
Issue number1
StatePublished - Jan 2006
Externally publishedYes

Keywords

  • Dead-time effect
  • Inverter
  • No-dead-time control
  • Selective harmonic elimination

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