@inproceedings{82ad7b2371534e19a21a6dbe5513c4a0,
title = "Source code profiling for ASIP design: Strategy and implementation",
abstract = "Designing Instruction Set Architecture (ISA) of the Application Specific Instruction set Processor (ASIP) is the most important step in the ASIP design. It is based on deep understanding of the application algorithm, while understanding of the algorithm depends on analyzing of related source code. The traditional source code profilers couldn't provide enough accuracy or machine independent property. Towards the ISA design requirements a fine grained profile strategy based on the Intermediate Representation of the C compiler will be presented in this paper. Beside the statics of the basic C operate and sub function, this strategy also give the basic block execute count and the variable count in sub functions. Case study will be explained to show how this profiling strategy is used for ISA design, and also to show how basic block execute information be used to complex instructions design and how variable count information be used to guide the heap and stack design.",
keywords = "Basic Block, Code Profiling, DFG, ISA, t ASIP",
author = "Qian Chen and Quan Jinguo and Yan Zhang and Jinbin Ju",
year = "2011",
doi = "10.1109/ICECC.2011.6066550",
language = "英语",
isbn = "9781457703218",
series = "2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings",
pages = "1032--1035",
booktitle = "2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings",
note = "2011 International Conference on Electronics, Communications and Control, ICECC 2011 ; Conference date: 09-09-2011 Through 11-09-2011",
}