TY - GEN
T1 - Sneak Circuit Analysis Covering Interface Circuits in Spacecraft Integrated Chips while Considering Faults
AU - Liu, Weiming
AU - Chen, Cen
AU - Xiao, Kaiwen
AU - Feng, Mingtao
AU - Zhang, Haonan
AU - Zhai, Guofu
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - Sneak circuit analysis is a crucial reliability design process. In the design of spacecraft electronic systems, it is challenging to identify sneak circuits related to integrated chip interface circuits, and there are few targeted researches. In extreme working conditions, the coupling sneak circuits caused by the failure of integrated chips are difficult to identify, affecting the design optimization. The paper proposes a typical interface information specification model for integrated chips to simulate the electrical information characteristics of interfaces. And the typical failure models of intrinsic components inside the chip are determined through multi-physics field analysis. Then, based on the digital model, a sneak circuit diagnosis process based on excitation and fault injection are proposed, and a sneak circuit screening method based on Python virtual prototyping is implemented in the case study. Finally, the design constraint clues for the chip's external circuit are obtained, which provides a reference for related fault diagnosis and reliability optimization works.
AB - Sneak circuit analysis is a crucial reliability design process. In the design of spacecraft electronic systems, it is challenging to identify sneak circuits related to integrated chip interface circuits, and there are few targeted researches. In extreme working conditions, the coupling sneak circuits caused by the failure of integrated chips are difficult to identify, affecting the design optimization. The paper proposes a typical interface information specification model for integrated chips to simulate the electrical information characteristics of interfaces. And the typical failure models of intrinsic components inside the chip are determined through multi-physics field analysis. Then, based on the digital model, a sneak circuit diagnosis process based on excitation and fault injection are proposed, and a sneak circuit screening method based on Python virtual prototyping is implemented in the case study. Finally, the design constraint clues for the chip's external circuit are obtained, which provides a reference for related fault diagnosis and reliability optimization works.
KW - failure mechanism
KW - integrated chip
KW - interface circuit
KW - reliability design
KW - sneak circuit analysis
UR - https://www.scopus.com/pages/publications/85215327154
U2 - 10.1109/SRSE63568.2024.10772492
DO - 10.1109/SRSE63568.2024.10772492
M3 - 会议稿件
AN - SCOPUS:85215327154
T3 - 2024 6th International Conference on System Reliability and Safety Engineering, SRSE 2024
SP - 222
EP - 228
BT - 2024 6th International Conference on System Reliability and Safety Engineering, SRSE 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Conference on System Reliability and Safety Engineering, SRSE 2024
Y2 - 11 October 2024 through 14 October 2024
ER -