SiC MOSFET V _th sampling circuit design based on JEP183A

The threshold voltage (Vth) is a crucial indicator in determining the health of the gate of a power semiconductor. In response to the challenges posed by low measurement accuracy and a lack of standardization in SiC MOSFET Vth test, a design scheme for a high-precision measurement circuit for SiC MOSFET Vth based on the JEP183A standard is proposed in this paper. Firstly, an initial analysis was conducted on the JEP183A requirements for the Vth sampling circuit, identifying the functional modules and components for the circuit implementation. Secondly, Then the operational principle of each functional module of the Vth sampling circuit is described. Finally, the testing of three sets of SiC MOSFET devices from the same batch verified the proposed circuit. Experimental results demonstrate Vth repeatability error below 4.7% with absolute accuracy of ±0.01 V under 3 V drain-source bias conditions. This paper contributes to the first reproducible hardware implementation of the JEP183A standard, thus providing an effective test tool for Vth measurements.