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Research on common-mode voltage reduction in multi-level inverter

  • Yan Shu Jiang*
  • , Dian Guo Xu
  • , Hong Zhao
  • , Yu Liu
  • *Corresponding author for this work
  • Harbin University of Science and Technology
  • Harbin Institute of Technology

Research output: Contribution to journalArticlepeer-review

Abstract

PWM technology for common-mode voltage reduction in three-level inverter is investigated whereas common-mode voltage generated by two-level inverter can only be reduced by an additional filter. With effective on-off states in three level inverter, common-mode voltage generated by three-level inverter is analyzed, then a conclusion is gained that common-mode voltage can be reduced by using software in odd-level inverter. Reducing and canceling common-mode voltage methods are presented using SPWM (Sinusoidal Pulse Width Modulation). Simulation results validate their correctness. A comparison is also made among their effects on motor performance, and then usability of the proposed methods is analyzed.

Original languageEnglish
Pages (from-to)18-22
Number of pages5
JournalZhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering
Volume25
Issue number3
StatePublished - 1 Feb 2005

Keywords

  • Common-mode voltage
  • Electric power engineering
  • SPWM
  • Three-level inverter

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