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Reduction of Common-Mode Voltage and NP Voltage Oscillation for Three-Level Vienna Rectifiers Using Alternative Phase Opposition Disposition PWM

  • Peng Zhang
  • , Xuezhi Wu*
  • , Bowei Li
  • , Li Ding
  • , Jing Long
  • , Weige Zhang
  • , Yunwei Li
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this article, a simple pulse width modulation (PWM) method based on zero-sequence component injection and alternative phase opposition disposition PWM (APODPWM) is proposed for three-level Vienna rectifiers to simultaneously reduce the common-mode voltage (CMV) and mitigate the neutral-point (NP) voltage oscillation. First, to avoid using the small vectors with high CMV, the range limitation of the zero-sequence component is investigated. Then, a specific zero-sequence component that satisfies the above limitation is calculated and injected into three-phase reference signals to balance the NP voltage. Moreover, for the zero-crossing intervals where the NP voltage oscillation cannot be suppressed, a coordinating factor is introduced to adjust the maximum and minimum reference signals for reducing the spike NP current. Finally, the effectiveness and performance of the proposed method are verified by experimental results.

Original languageEnglish
Pages (from-to)8237-8247
Number of pages11
JournalIEEE Transactions on Industrial Electronics
Volume71
Issue number8
DOIs
StatePublished - 1 Aug 2024
Externally publishedYes

Keywords

  • 3L-vienna rectifier
  • alternative phase opposition disposition PWM (APODPWM)
  • common-mode voltage reduction
  • neutral-point (NP) voltage oscillation suppression
  • zero-sequence component injection

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