Real-time implementation of harris corner detection system based on FPGA

With the development of the manufacturing technique of the microchip, the integral performance of the Field-Programmable Gate Array (FPGA) is becoming more and more adaptive for real-time embedded systems. Interest point detection is a prime step in many advanced computer vision applications such as 3-D reconstruction, 3-D object tracking and so on. Many image processing algorithms need to extract interest point in advance. We can easily implement these algorithms in software, but it can't meet with the request of a real-time embedded systems because of its low speed. In this paper, we achieved a hardware implementation of the Harris corner feature detector based on Zedboard platform which is a heterogeneous SoC composed of two ARM9 chips and a Xilinx xc7z020-clg484-1 chip. The hardware architecture is implemented with Verilog HDL and consists of 6 modules: CMOS register initialization, CMOS data fetcher, CMOS data graying, block RAM frame buffer, Harris Corner Detector(HCD), HDMI displayer. The implementation can process RGB565 video in 640×480 resolution. According to the simulation results, the hardware implementation can extract Harris corner at the speed of 154 frames per second. It can meet most requirements for real-time computer vision applications.