TY - GEN
T1 - Radar Signal-Level Model Parallel Acceleration Method Based on Multi-GPU Architecture
AU - Liu, Yilin
AU - Zhang, Ruiyang
AU - Lu, Yaoyao
AU - Ai, Shengmin
AU - Wang, Benkuan
AU - Liu, Datong
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - Signal-level radar modeling faces significant computational bottlenecks due to massive datasets and intensive operations including pulse compression (PC), moving target indication (MTI), moving target detection (MTD), and constant false alarm rate (CFAR) processing. Traditional CPU-based implementations exhibit poor real-time performance, while single-GPU solutions suffer from memory bandwidth limitations and resource contention. This paper presents a multi-GPU parallel acceleration framework that leverages heterogeneous CPU-GPU architecture to overcome these challenges. The proposed method employs an odd-even frame allocation strategy to distribute radar echo data across two GPUs, enabling simultaneous processing of independent frames. Optimized parallel computing architectures are developed for core signal processing modules, utilizing CUDA framework optimizations and Direct Memory Access (DMA) technology for efficient data transfer. Experimental results on a CPU with dual GPUs demonstrate significant performance improvements: pulse compression achieves 1 0 2. 8 8 × acceleration, MTI reaches 164 × speedup, and CFAR obtains 153.8 × acceleration compared to CPU-only implementations. The overall system achieves 109.6 × acceleration while maintaining signal processing accuracy, enabling real-time radar simulation capabilities for next-generation radar system development.
AB - Signal-level radar modeling faces significant computational bottlenecks due to massive datasets and intensive operations including pulse compression (PC), moving target indication (MTI), moving target detection (MTD), and constant false alarm rate (CFAR) processing. Traditional CPU-based implementations exhibit poor real-time performance, while single-GPU solutions suffer from memory bandwidth limitations and resource contention. This paper presents a multi-GPU parallel acceleration framework that leverages heterogeneous CPU-GPU architecture to overcome these challenges. The proposed method employs an odd-even frame allocation strategy to distribute radar echo data across two GPUs, enabling simultaneous processing of independent frames. Optimized parallel computing architectures are developed for core signal processing modules, utilizing CUDA framework optimizations and Direct Memory Access (DMA) technology for efficient data transfer. Experimental results on a CPU with dual GPUs demonstrate significant performance improvements: pulse compression achieves 1 0 2. 8 8 × acceleration, MTI reaches 164 × speedup, and CFAR obtains 153.8 × acceleration compared to CPU-only implementations. The overall system achieves 109.6 × acceleration while maintaining signal processing accuracy, enabling real-time radar simulation capabilities for next-generation radar system development.
KW - heterogeneous computing
KW - multi-GPU
KW - parallel processing
KW - radar signal-level model
UR - https://www.scopus.com/pages/publications/105034888241
U2 - 10.1109/ICSMD67131.2025.11365469
DO - 10.1109/ICSMD67131.2025.11365469
M3 - 会议稿件
AN - SCOPUS:105034888241
T3 - ICSMD 2025 - International Conference on Sensing, Measurement and Data Analytics in the Era of Artificial Intelligence
BT - ICSMD 2025 - International Conference on Sensing, Measurement and Data Analytics in the Era of Artificial Intelligence
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Conference on Sensing, Measurement and Data Analytics in the Era of Artificial Intelligence, ICSMD 2025
Y2 - 21 November 2025 through 23 November 2025
ER -