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Power research of JPEG circuits in FPGA

  • Harbin Institute of Technology Weihai
  • School of Astronautics, Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents some power results of Joint Photographic Experts Group (JPEG) in Field-Programmable Gate Array (FPGA) and provides some analysis and results in reduced dynamics-power methods of it. The dynamic power consumed by a digital CMOS circuit is directly proportional to both switching activity and payload capacitance. We use Xilinx XPower Analyzer to analyze the impact of different switching frequency of JPEG in FPGA and optimization results. Experimental results show that the dynamic power is linear with switching frequency and reduces with glitching reducing techniques.

Original languageEnglish
Title of host publicationProceedings - 7th International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IIHMSP 2011
Pages206-208
Number of pages3
DOIs
StatePublished - 2011
Externally publishedYes
Event7th International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IIHMSP 2011 - Dalian, China
Duration: 14 Oct 201116 Oct 2011

Publication series

NameProceedings - 7th International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IIHMSP 2011

Conference

Conference7th International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IIHMSP 2011
Country/TerritoryChina
CityDalian
Period14/10/1116/10/11

Keywords

  • FPGA
  • JPEGt
  • dynamic power

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