Power optimization with interconnect repeater heat transferance effect

With the development of Integrated Circuit (IC) process, the power of a chip increases dramatically. To improve the power and temperature characteristics of a chip, the method that reduces power by increasing delay is presented in the paper based on the electro-thermal coupling among power, temperature and delay by taking repeater heat transfer effect into consideration. Optimized interconnect length and repeater size are obtained in 45nm process technology by using MATLAB. The simulation results show that the length of optimized interconnect, considering repeaters heat transferred, can be longer by two percent while temperature is lower than no considering. Besides, when the inserted repeater numbers increase on the base of optimization, the temperature of interconnect can be reduced while the chip temperature increase little when the length of interconnect is shorter than 15mm. Low temperature of interconnect can contribute to keeping signal integrity.