Polar Code With Parity Check-Assisted Pruning for Error Correction in Modern Flash Memory

Three-dimensional (3-D) nand flash memory has emerged as the predominant solution for high-capacity nonvolatile data storage. However, the continuous increase in storage density has concurrently led to significant challenges in data reliability degradation. This article investigates the application of polar codes for error correction in nand Flash memory. We propose a combined Monte Carlo (CMC) method to dynamically determine information bit positions in polar code encoding for flash memory chips under varying reliability statuses. For decoding, we identify that the hard-decision read mechanism in flash memory introduces extreme log-likelihood ratio (LLR) quantization effects. This quantization phenomenon may erroneously prune correct decoding paths during successive cancellation list (SCL) decoding, thereby degrading the error correction capability of polar codes. To address this critical issue, we develop a cascaded parity-check (PC)-assisted path pruning scheme integrated with the SCL algorithm. The experimental results demonstrate that the proposed polar code algorithm can significantly enhance the reliability of data storage in nand flash memory. In the long code length scenario, the proposed polar decoding scheme with PC-assisted pruning achieves a maximum uncorrectable bit error rate (UBER) reduction of 98.62% compared to algorithms without PC. The proposed approach demonstrates an 8.56 times increase in the raw bit error rate (RBER) threshold for achieving 100% error correction success, significantly surpassing the performance of conventional low-density parity-check (LDPC) codes, especially toward the end of the flash memory's lifespan.