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Optimization of kernel-level checkpoint mechanism for wearable computer systems

  • School of Computer Science and Technology, Harbin Institute of Technology

Research output: Contribution to journalArticlepeer-review

Abstract

To improve the reliability and availability of wearable computer, the paper presents the strategies for optimization of kernel-level checkpoint mechanism for wearable computer systems-the technologies of the step-checkpointing (SP-CKPT) and the memory monitoring and threshold-control (MMTC). According to the characteristics of software or hardware environment-dependent system, SP-CKPT modulates the checkpoint intervals on-line. When failures occur frequently, checkpoint interval is set to the minimum length, then increased exponentially, in order to promptly normalize the checkpoint interval. MMTC adjusts the checkpointing interval by predicting the amount of data to be saved to implement the kernel-level memory-exclusion. SP-CKPT and MMTC respectively optimize the checkpoint interval from the aspect of time and space. The simulation results show the two schemes can effectively improve the performance of wearable computers and reduce the cost both in failure-free run and rollback recovery.

Original languageEnglish
Pages (from-to)492-497
Number of pages6
JournalGaojishu Tongxin/Chinese High Technology Letters
Volume18
Issue number5
StatePublished - May 2008
Externally publishedYes

Keywords

  • Checkpoint interval
  • Kernel-level checkpoint
  • Memory monitoring and threshold-control (MMTC)
  • Step-checkpointing (SP-CKPT)
  • Wearable computer

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