Optimization of Built-In Self-Test test chain configuration in 2.5D Integrated Circuits Using Constrained Multi-Objective Evolutionary Algorithm

2.5D Integrated Circuit (2.5D IC) is an advanced packaging technology. This technology facilitates the dense integration of multiple dies by adding passive components to the silicon interposer. However, the high-density stacking of dies has increased the complexity of IC. Its highly interconnected nature presents a series of challenges for IC testing. As for 2.5D IC testing utilizing the Built-In Self-Test(BIST) architecture, a dual-objective optimal model is established for test chain configuration. The model aims to minimize both hardware testing costs and test time, considering constraints related to maximum power consumption and maximum testing time. Subsequently, A generic encoding and decoding method is devised to enable the direct application of existing Multi-Objective Evolutionary Algorithms (MOEAs) and Constrained Multi-Objective Evolutionary Algorithms (CMOEAs) to solve the test chain configuration problem. Simultaneously, a dual-stage dual-population CMOEA is devised, integrating diverse local search strategies and adaptively adjusting them based on a successful incentive mechanism. Additionally, a constraint handling framework is introduced, utilizing the relationship between the Constrained Pareto Front (CPF) and Unconstrained Pareto Front (UPF) to assist in searching for solutions that satisfy constraints. This framework also adaptively allocates computational resources by assessing the collaborative effects of auxiliary tasks. Multiple experiments are designed and conducted to demonstrate the correctness and effectiveness of the proposed model and algorithm. Comparative analysis with 8 MOEAs or CMOEAs reveals that the proposed algorithm outperforms in solving the test chain configuration problem.