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On a web-graph-based micronetwork architecture for SoCs

  • Ling Wang*
  • , Shouye Piao
  • , Yingtao Jiang
  • , Juyeon Jo
  • , Lihong Zhang
  • *Corresponding author for this work
  • Harbin Institute of Technology
  • University of Nevada, Las Vegas
  • Memorial University of Newfoundland

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

From System-on-chip to Network-on-chip, the main dissimilarity is replacing the bus with the network. How connect, how formative network function is related to topology structure. In this paper we propose a topology structure for NoC, and compare it with mesh, torus, the fat tree, octagon , spidergon topology networks by five kinds of mainly properties : node degree, network diameter, connectivity, the average most short-circuit path and the average shortest wire length. Experiment results show that this topology has better performance on cost/performance layout.

Original languageEnglish
Title of host publication2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference Proceedings
Pages1392-1395
Number of pages4
DOIs
StatePublished - 2007
Event2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference - Montreal, QC, Canada
Duration: 5 Aug 20078 Aug 2007

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference
Country/TerritoryCanada
CityMontreal, QC
Period5/08/078/08/07

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