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Modified Single-Edge SVPWM Technique to Reduce the Switching Losses and Increase PWM Harmonics Frequency for Three-Phase VSIs

  • Automotive Products Group
  • School of Electrical Engineering and Automation, Harbin Institute of Technology

Research output: Contribution to journalArticlepeer-review

Abstract

This article proposed a modified single-edge space vector pulsewidth modulation (MS-SVPWM) technique by adjusting the zero vectors of saw-tooth carrier SVPWM technique for three-phase voltage source inverters to reduce the switching losses and increase the PWM noises frequency. Mathematical analysis and implementation of the proposed MS-SVPWM are demonstrated in detail. The differences in PWM noises reduction between MS-SVPWM and modified SVPWM technique are compared by time-varying PWM noises analysis, computer simulation, and experimental results. With the same average switching frequency of conventional SVPWM, MS-SVPWM could increase the PWM harmonics frequency by 50%. Employing the same carrier frequency, MS-SVPWM could reduce average switching frequency by 33% compared with conventional SVPWM technique, and the switching losses could be reduced by more than 25% when the phase angle is less than 60°. Reduction of switching losses could ease the cooling requirements and result in greater compactness of the system, especially vital concern in high-power applications and limited-space environments. The detailed experimental results confirm the effectiveness of the proposed MS-SVPWM at last.

Original languageEnglish
Article number9006903
Pages (from-to)10643-10653
Number of pages11
JournalIEEE Transactions on Power Electronics
Volume35
Issue number10
DOIs
StatePublished - Oct 2020
Externally publishedYes

Keywords

  • Harmonic suppression
  • low-order harmonics
  • space vector pulsewidth modulation (SVPWM)
  • switching losses
  • three-phase voltage source inverter (VSI)

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