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Low cost chip-on-dot flip chip technique for unbumped die

  • Z. P. Wang
  • , Y. M. Tan
  • , C. M. Schreiber
  • , H. Feigenbaum
  • , Z. F. Shi
  • , J. Wei
  • Agency for Science, Technology and Research, Singapore
  • Packard-Hughes Interconnect

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The chip-on-dot flip chip technique has been developed for assembling chips on bumped Gold Dot™ flexible substrates which do not require either under-bump metallization (UBM) or bumping of the die. This paper presents the latest developments in this technology. 3D finite element contact analysis was conducted to study the pressure distribution in the contact area of each dot. The chip-on-dot assembly process was simulated with temperature-dependent material properties. It was found that the average contact pressure during the bonding process strongly depended upon the dot geometry. It was found that with the optimal dot shape, the distribution of contact pressure promoted diffusion bonding across the whole contact area and produced little damage to Al pads. An electrically functional prototype was constructed and assembled using the chip-on-dot technique. The test vehicles were subject to temperature cycling tests. The test conditions were from -55°C to +125°C with 15 minutes dwell at the extreme temperatures. The test results are presented in the paper. It is concluded that this technique is potentially a low-cost and lead-free process, which eliminates the requirement for UBM and wafer bumping and does not need underfilling after assembly.

Original languageEnglish
Title of host publicationProceedings of 3rd Electronics Packaging Technology Conference, EPTC 2000
EditorsCharles Lee, Kok Chuan Toh, Thiam Beng Lim
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages297-301
Number of pages5
ISBN (Electronic)0780366441
DOIs
StatePublished - 2000
Externally publishedYes
Event3rd Electronics Packaging Technology Conference, EPTC 2000 - Singapore, Singapore
Duration: 5 Dec 20007 Dec 2000

Publication series

NameProceedings of the Electronic Packaging Technology Conference, EPTC
Volume2000-January

Conference

Conference3rd Electronics Packaging Technology Conference, EPTC 2000
Country/TerritorySingapore
CitySingapore
Period5/12/007/12/00

Keywords

  • Assembly
  • Contacts
  • Costs
  • Finite element methods
  • Flip chip
  • Gold
  • Material properties
  • Metallization
  • Temperature
  • Testing

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