Skip to main navigation Skip to search Skip to main content

Lifetime model for advanced N-Channel transistor hot-carrier-injection degradation

  • Yale University

Research output: Contribution to journalArticlepeer-review

Abstract

A hot-carrier-injection (HCI) lifetime model of high-voltage (HV) N-channel transistors based on physical and mathematical basis is proposed. HV N-channel transistors show two peak values in the substrate-currentgate-voltage curve due to two high-electric-field regions (THFRs). The THFRs of HV transistors are found to be responsible for two coexistent HCI degradation mechanismsinterface trap generation and hole injection. The HCI lifetime model is modified based on the combined degradation mechanisms and updated substrate current model in HV N-channel transistors.

Original languageEnglish
Article number5454343
Pages (from-to)525-527
Number of pages3
JournalIEEE Electron Device Letters
Volume31
Issue number6
DOIs
StatePublished - Jun 2010
Externally publishedYes

Keywords

  • Semiconductor device measurement
  • Semiconductor device modeling
  • Semiconductor device reliability

Fingerprint

Dive into the research topics of 'Lifetime model for advanced N-Channel transistor hot-carrier-injection degradation'. Together they form a unique fingerprint.

Cite this