High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links

Jianyu Wang; Jianwei Tang; Yaguang Hao; Xiuquan Cui; Linsheng Fan; Zhongliang Sun; Junpeng Liang; Zhaopeng Xu; Yanfu Yang; Weisheng Hu; Jinlong Wei

doi:10.1109/ACP66871.2025.11349976

High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links

Jianyu Wang
, Jianwei Tang
, Yaguang Hao
, Xiuquan Cui
, Linsheng Fan
, Zhongliang Sun
, Junpeng Liang
, Zhaopeng Xu
, Yanfu Yang^*
, Weisheng Hu
, Jinlong Wei^*

^*Corresponding author for this work

Pengcheng Laboratory
Harbin Institute of Technology Shenzhen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

We implement a low-complexity Lite-DSP based on FPGA for IM/DD optical data links, achieving real-time 29.4912 Gbps PAM4 transmission over 10 km SSMF with BER below the 7% HD-FEC threshold using a 1550 nm DML.

Original language	English
Title of host publication	2025 Asia Communications and Photonics Conference, ACP 2025
Publisher	Optica Publishing Group (formerly OSA)
ISBN (Electronic)	9798350357400
DOIs	https://doi.org/10.1109/ACP66871.2025.11349976
State	Published - 2025
Externally published	Yes
Event	2025 Asia Communications and Photonics Conference, ACP 2025 - Jiangsu, China Duration: 5 Nov 2025 → 8 Nov 2025

Publication series

Name	Asia Communications and Photonics Conference, ACP
ISSN (Print)	2162-108X

Conference

Conference	2025 Asia Communications and Photonics Conference, ACP 2025
Country/Territory	China
City	Jiangsu
Period	5/11/25 → 8/11/25

Keywords

BER
FPGA implementation
feed-forward equalization
low-complexity
real-time
timing recovery

Access to Document

10.1109/ACP66871.2025.11349976

Cite this

Wang, J., Tang, J., Hao, Y., Cui, X., Fan, L., Sun, Z., Liang, J., Xu, Z., Yang, Y., Hu, W., & Wei, J. (2025). High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links. In 2025 Asia Communications and Photonics Conference, ACP 2025 (Asia Communications and Photonics Conference, ACP). Optica Publishing Group (formerly OSA). https://doi.org/10.1109/ACP66871.2025.11349976

@inproceedings{50b2e843c32b429d88635c3d53983f5a,

title = "High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links",

abstract = "We implement a low-complexity Lite-DSP based on FPGA for IM/DD optical data links, achieving real-time 29.4912 Gbps PAM4 transmission over 10 km SSMF with BER below the 7\% HD-FEC threshold using a 1550 nm DML.",

keywords = "BER, FPGA implementation, feed-forward equalization, low-complexity, real-time, timing recovery",

author = "Jianyu Wang and Jianwei Tang and Yaguang Hao and Xiuquan Cui and Linsheng Fan and Zhongliang Sun and Junpeng Liang and Zhaopeng Xu and Yanfu Yang and Weisheng Hu and Jinlong Wei",

note = "Publisher Copyright: {\textcopyright} 2025 IEEE.; 2025 Asia Communications and Photonics Conference, ACP 2025 ; Conference date: 05-11-2025 Through 08-11-2025",

year = "2025",

doi = "10.1109/ACP66871.2025.11349976",

language = "英语",

series = "Asia Communications and Photonics Conference, ACP",

publisher = "Optica Publishing Group (formerly OSA)",

booktitle = "2025 Asia Communications and Photonics Conference, ACP 2025",

address = "美国",

}

Wang, J, Tang, J, Hao, Y, Cui, X, Fan, L, Sun, Z, Liang, J, Xu, Z, Yang, Y, Hu, W & Wei, J 2025, High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links. in 2025 Asia Communications and Photonics Conference, ACP 2025. Asia Communications and Photonics Conference, ACP, Optica Publishing Group (formerly OSA), 2025 Asia Communications and Photonics Conference, ACP 2025, Jiangsu, China, 5/11/25. https://doi.org/10.1109/ACP66871.2025.11349976

High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links. / Wang, Jianyu; Tang, Jianwei; Hao, Yaguang et al.
2025 Asia Communications and Photonics Conference, ACP 2025. Optica Publishing Group (formerly OSA), 2025. (Asia Communications and Photonics Conference, ACP).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links

AU - Wang, Jianyu

AU - Tang, Jianwei

AU - Hao, Yaguang

AU - Cui, Xiuquan

AU - Fan, Linsheng

AU - Sun, Zhongliang

AU - Liang, Junpeng

AU - Xu, Zhaopeng

AU - Yang, Yanfu

AU - Hu, Weisheng

AU - Wei, Jinlong

PY - 2025

Y1 - 2025

N2 - We implement a low-complexity Lite-DSP based on FPGA for IM/DD optical data links, achieving real-time 29.4912 Gbps PAM4 transmission over 10 km SSMF with BER below the 7% HD-FEC threshold using a 1550 nm DML.

AB - We implement a low-complexity Lite-DSP based on FPGA for IM/DD optical data links, achieving real-time 29.4912 Gbps PAM4 transmission over 10 km SSMF with BER below the 7% HD-FEC threshold using a 1550 nm DML.

KW - BER

KW - FPGA implementation

KW - feed-forward equalization

KW - low-complexity

KW - real-time

KW - timing recovery

UR - https://www.scopus.com/pages/publications/105034140688

U2 - 10.1109/ACP66871.2025.11349976

DO - 10.1109/ACP66871.2025.11349976

M3 - 会议稿件

AN - SCOPUS:105034140688

T3 - Asia Communications and Photonics Conference, ACP

BT - 2025 Asia Communications and Photonics Conference, ACP 2025

PB - Optica Publishing Group (formerly OSA)

T2 - 2025 Asia Communications and Photonics Conference, ACP 2025

Y2 - 5 November 2025 through 8 November 2025

ER -

High-speed, Low-complexity and Real-time FPGA Implementation of PAM-4 Lite-DSP Receiver for IM/DD Optical Data Links

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