Abstract
Erasure coding is a widely used redundancy technique for fault tolerance in data storage systems, offering significant space savings. However, it generally incurs substantial computational overhead. While existing research has explored various optimization techniques for classical Reed-Solomon (RS) erasure codes, more recent shift-XOR codes, which feature significantly lower computational complexity, have received comparatively little attention. In this paper, we focus on two-tone, the state-of-the-art shift-XOR code, and present the first comprehensive and high-optimized implementation of two-tone, FastTT. Due to its inherent shifting pattern, two-tone encounters challenges including redundant memory access operations and inefficient data traversal patterns. To address these issues, we propose a suite of optimization techniques: (1) Cache-Friendly Window Partitioning to improve data locality in both encoding and decoding; (2) Neighbor-Merging Access that combines adjacent data operations within registers to reduce memory traffic in encoding; (3) Erasure-Parity Mapping that simplifies the decoding process of all data and parity erased cases; and (4) Traversal Pattern Selection for accelerating the single-erasure recovery by exploiting the vectorization store operations. Validated across multiple configurations, FastTT consistently outperforms the state-of-the-art erasure coding libraries, including ISA-L and Cerasure, achieving an average encoding throughput improvement of 36.2% (up to 84.1%) and an average decoding throughput improvement of 33.5% (up to 182.1%).
| Original language | English |
|---|---|
| Title of host publication | Proceedings - 2026 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2026 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 485-497 |
| Number of pages | 13 |
| ISBN (Electronic) | 9798319506023 |
| DOIs | |
| State | Published - 2026 |
| Externally published | Yes |
| Event | 40th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2026 - New Orleans, United States Duration: 25 May 2026 → 29 May 2026 |
Conference
| Conference | 40th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2026 |
|---|---|
| Country/Territory | United States |
| City | New Orleans |
| Period | 25/05/26 → 29/05/26 |
Keywords
- Data Locality
- Erasure Coding
- Shift-XOR Codes
- Storage Systems
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