Skip to main navigation Skip to search Skip to main content

Effect of adding DC-offset estimation integrators in there-phase enhanced phase-locked loop on dynamic performance and alternative scheme

Research output: Contribution to journalArticlepeer-review

Abstract

Three-phase enhanced phase-locked loop (3P-EPLL) can estimate the amplitude, frequency and phase angle of the positive sequence of the three-phase inputs without using a synchronous reference frame. However, the presence of DC offsets in the inputs of the conventional 3P-EPLL introduces a periodic ripple in the estimated information. Thus, DC-offset estimation integrators (DCEIs) to estimate and feedback the DC component as an error signal are introduced in 3P-EPLL to eliminate the disturbance. This study presents a comprehensive study of the transient performance of 3P-EPLL with DCEIs, proving that a worse and longer dynamic period is caused by the coupling of the frequency and amplitude loop resulted from DCEI. Further, a hybrid filtering 3P-EPLL based on delayed-signal cancellation to reject the DC component and sliding Goertzel transform-based filter to eliminate the effect of harmonics and unbalanced inputs is proposed. Thus, a correct estimation is achieved even under unbalanced inputs with both DC and harmonic components. A set of detailed experiments of the former three enhanced phase-locked loops (EPLLs) are presented to display the deficit of the conventional EPLLs and better performance of the proposed scheme.

Original languageEnglish
Pages (from-to)391-400
Number of pages10
JournalIET Power Electronics
Volume8
Issue number3
DOIs
StatePublished - 1 Mar 2015

Fingerprint

Dive into the research topics of 'Effect of adding DC-offset estimation integrators in there-phase enhanced phase-locked loop on dynamic performance and alternative scheme'. Together they form a unique fingerprint.

Cite this