Skip to main navigation Skip to search Skip to main content

DRPTM: A Decoupled Read-efficient High-scalable Persistent Transactional Memory

  • School of Computer Science and Technology, Harbin Institute of Technology
  • Guangdong Provincial Key Laboratory of Novel Security Intelligence Technologies

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Persistent transactional memory (PTM) exploits transactions to provide an easy crash-consistent interface for persistent memory (PM). However, because of the substantial reader-side overhead brought on by the low bandwidth and long persistence latency of PM, present PTM research cannot scale effectively. This paper proposes a highly scalable PTM system, DRPTM, which allows nearly non-overhead reads without lowering the isolation level. DRPTM decouples persistence latency from concurrency control and traces the read-only copy maintained in logs as a lightweight read set. The evaluation shows that DRPTM significantly outperforms the state-of-the-art PTM systems for various workloads and achieves near-linear scalability.

Original languageEnglish
Title of host publication2023 60th ACM/IEEE Design Automation Conference, DAC 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350323481
DOIs
StatePublished - 2023
Externally publishedYes
Event60th ACM/IEEE Design Automation Conference, DAC 2023 - San Francisco, United States
Duration: 9 Jul 202313 Jul 2023

Publication series

NameProceedings - Design Automation Conference
Volume2023-July
ISSN (Print)0738-100X

Conference

Conference60th ACM/IEEE Design Automation Conference, DAC 2023
Country/TerritoryUnited States
CitySan Francisco
Period9/07/2313/07/23

Fingerprint

Dive into the research topics of 'DRPTM: A Decoupled Read-efficient High-scalable Persistent Transactional Memory'. Together they form a unique fingerprint.

Cite this