Design of an SHA-Less Pipeline ADC With Op-Amp Sharing Techniques for MAPS

As the leading research platform of heavy-ion science in China, the heavy-ion physics and applications at the Heavy Ion Research Facility in Lanzhou (HIRFL) and the High-Intensity heavy-ion Accelerator Facility (HIAF) drive the development of new detector technology. A monolithic active pixel sensor (MAPS) has been designed in a 130-nm CMOS process for HIRLF and HIAF. This MAPS can measure the energy deposition and position of the particle hit. As the critical component of this MAPS, a regional 12-bit 40-Msps pipeline ADC has been designed to convert the analog signals from the pixels into digital data. Due to the strict limitation on power and area, this ADC adopts the SHA-less architecture and stepwise capacitance reduction. Also, the op-amp sharing technology is used in the 1.5-bit stages. This ADC has a power consumption of 60 mW and occupies $874\times 550\,\,\mu \text{m}$. Simulation results indicate that it achieves an ENOB of 11.77 bits and a SINAD of 72.57 dB at the tt corner with an input frequency of 3.291 MHz. The figure of merits (FOM) value is 507 fJ/step.