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Design and Implementation of a DSSS/UQPSK Demodulation Algorithm Based on FPGA

  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a scheme of UQPSK demodulation algorithm on FPGA which is based on direct sequence spread spectrum (DSSS) communication system. The research is focused on synchronization technology of DSSS/UQPSK signal and design of synchronization loops. The main content of this demodulation algorithm includes carrier synchronization loop and DSSS code synchronization loop. Among them, carrier synchronization loop adopts a second-order feedback closed-loop based on the theory of Costas, and DSSS code synchronization loop uses a method of spread spectrum signal acquisition sliding correlation. In the project that the author participated in, the function of DSSS/UQPSK demodulation algorithm was realized successfully on the FPGA platform.

Original languageEnglish
Title of host publicationCommunications, Signal Processing, and Systems - Proceedings of the 2018 CSPS Volume 1
Subtitle of host publicationCommunications
EditorsWei Wang, Jiasong Mu, Zhenyu Na, Qilian Liang, Baoju Zhang, Xin Liu
PublisherSpringer Verlag
Pages32-38
Number of pages7
ISBN (Print)9789811362637
DOIs
StatePublished - 2019
EventInternational Conference on Communications, Signal Processing, and Systems, CSPS 2018 - Dalian, China
Duration: 14 Jul 201816 Jul 2018

Publication series

NameLecture Notes in Electrical Engineering
Volume515
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Conference

ConferenceInternational Conference on Communications, Signal Processing, and Systems, CSPS 2018
Country/TerritoryChina
CityDalian
Period14/07/1816/07/18

Keywords

  • DSSS
  • Demodulation algorithm
  • FPGA
  • UQPSK

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