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Comments on “Extend orthogonal Latin square codes for 32-bit data protection in memory applications” Microelectron. Reliab. 63, 278–283 (2016)

  • Shanshan Liu*
  • , Pedro Reviriego
  • , Alfonso Sánchez-Macián
  • , Juan Antonio Maestro
  • , Liyi Xiao
  • *Corresponding author for this work
  • Harbin Institute of Technology
  • Antonio de Nebrija University

Research output: Contribution to journalLetterpeer-review

Abstract

Additional extended orthogonal Latin square codes to protect 32-bit data words are presented. The new codes require less parity bits than the ones presented in the original paper at the cost of a moderate overhead in encoding and decoding complexity.

Original languageEnglish
Pages (from-to)126-129
Number of pages4
JournalMicroelectronics Reliability
Volume69
DOIs
StatePublished - 1 Feb 2017

Keywords

  • Latin square code
  • Memory
  • Multiple cell upsets

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