Application of sensitivity analysis to hardware implementation of multilayer perceptron

The network structure design and the quantization bits selection in the hardware implementation of multilayer perceptron are investigated in case of the existence of quantization error. The sensitivity analysis approach for the hardware implementation of multilayer perceptron prior to network training is proposed. For multilayer perceptron with single hidden layer, the computer simulation is done to get the number of hidden neurons and quantization bit which satisfy the design requirement. The simulation result shows that this is an effective approach for the hardware implementation of multilayer perceptron theoretically.