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Analysis of an ESD Suppressor Used for IC Protection

  • Cheng Ta Kuo*
  • , Hsing Yi Chen
  • , Ying Suo
  • , Jinghui Qiu
  • *Corresponding author for this work
  • Yuan Ze University
  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The time-domain moment method was successfully used to analyze the capacitance, the electric field, and the electrostatic discharge (ESD) current of an ESD suppressor used for integrated circuit (IC) protection. The obtained capacitance of this ESD suppressor was also validated by measurement data. From simulation results, it is found that the maximum electric field of 354000 kV/m occurs at 2 ns which is much higher than the threshold electric field of 2900 kV/m for air breakdown. The ESD current with pulse waveform has a maximum value of 4.7 mA at 0.2 ns and has a very short duration time of about 20 ns before the ESD current approaches zero.

Original languageEnglish
Title of host publication2010 IEEE International Symposium on Antennas and Propagation and CNC-USNC/URSI Radio Science Meeting - Leading the Wave, AP-S/URSI 2010
DOIs
StatePublished - 2010
Event2010 IEEE International Symposium on Antennas and Propagation and CNC-USNC/URSI Radio Science Meeting - Leading the Wave, AP-S/URSI 2010 - Toronto, ON, Canada
Duration: 11 Jul 201017 Jul 2010

Publication series

Name2010 IEEE International Symposium on Antennas and Propagation and CNC-USNC/URSI Radio Science Meeting - Leading the Wave, AP-S/URSI 2010

Conference

Conference2010 IEEE International Symposium on Antennas and Propagation and CNC-USNC/URSI Radio Science Meeting - Leading the Wave, AP-S/URSI 2010
Country/TerritoryCanada
CityToronto, ON
Period11/07/1017/07/10

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