An automated fault injection technique based on VHDL syntax analysis and stratified sampling

Weiguang Sheng; Liyi Xiao; Zhigang Mao

doi:10.1109/DELTA.2008.36

An automated fault injection technique based on VHDL syntax analysis and stratified sampling

Weiguang Sheng^*
, Liyi Xiao
, Zhigang Mao

^*Corresponding author for this work

School of Astronautics

Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

Soft errors, a concern for space applications in the past, became a critical issue in deep sub-micron VLSI design for the continuous technology scaling. An automated fault injection technique is employed to characterise the recovery coverage and soft error sensitivity of the VHDL based design. Lexical and syntax analysis technique is developed to perform automated fault injection task. Stratified sampling technique is used to reduce the fault injection overheads. A fault injector, HSECT (HIT Soft Error Characterization Toolkit) is developed and 3,000 soft errors are injected into a simple RISC processor, DP32-processor. The recovery coverage and soft error sensitivity of the processor are also further investigated to direct the future design of the faulttolerant and dependable circuit.

Original language	English
Title of host publication	Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
Pages	587-591
Number of pages	5
DOIs	https://doi.org/10.1109/DELTA.2008.36
State	Published - 2008
Event	4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 - Hong Kong, SAR, Hong Kong Duration: 23 Jan 2008 → 25 Jan 2008

Publication series

Name	Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

Conference

Conference	4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
Country/Territory	Hong Kong
City	Hong Kong, SAR
Period	23/01/08 → 25/01/08

Access to Document

10.1109/DELTA.2008.36

Cite this

Sheng, W., Xiao, L., & Mao, Z. (2008). An automated fault injection technique based on VHDL syntax analysis and stratified sampling. In Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 (pp. 587-591). Article 4459618 (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008). https://doi.org/10.1109/DELTA.2008.36

@inproceedings{7b7aa45b37414b2cb744e7a566fc8a85,

title = "An automated fault injection technique based on VHDL syntax analysis and stratified sampling",

abstract = "Soft errors, a concern for space applications in the past, became a critical issue in deep sub-micron VLSI design for the continuous technology scaling. An automated fault injection technique is employed to characterise the recovery coverage and soft error sensitivity of the VHDL based design. Lexical and syntax analysis technique is developed to perform automated fault injection task. Stratified sampling technique is used to reduce the fault injection overheads. A fault injector, HSECT (HIT Soft Error Characterization Toolkit) is developed and 3,000 soft errors are injected into a simple RISC processor, DP32-processor. The recovery coverage and soft error sensitivity of the processor are also further investigated to direct the future design of the faulttolerant and dependable circuit.",

author = "Weiguang Sheng and Liyi Xiao and Zhigang Mao",

year = "2008",

doi = "10.1109/DELTA.2008.36",

language = "英语",

isbn = "0769531105",

series = "Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008",

pages = "587--591",

booktitle = "Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008",

note = "4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 ; Conference date: 23-01-2008 Through 25-01-2008",

}

Sheng, W, Xiao, L & Mao, Z 2008, An automated fault injection technique based on VHDL syntax analysis and stratified sampling. in Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008., 4459618, Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, pp. 587-591, 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008, Hong Kong, SAR, Hong Kong, 23/01/08. https://doi.org/10.1109/DELTA.2008.36

An automated fault injection technique based on VHDL syntax analysis and stratified sampling. / Sheng, Weiguang; Xiao, Liyi; Mao, Zhigang.
Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008. 2008. p. 587-591 4459618 (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Soft errors, a concern for space applications in the past, became a critical issue in deep sub-micron VLSI design for the continuous technology scaling. An automated fault injection technique is employed to characterise the recovery coverage and soft error sensitivity of the VHDL based design. Lexical and syntax analysis technique is developed to perform automated fault injection task. Stratified sampling technique is used to reduce the fault injection overheads. A fault injector, HSECT (HIT Soft Error Characterization Toolkit) is developed and 3,000 soft errors are injected into a simple RISC processor, DP32-processor. The recovery coverage and soft error sensitivity of the processor are also further investigated to direct the future design of the faulttolerant and dependable circuit.

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BT - Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

T2 - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

Y2 - 23 January 2008 through 25 January 2008

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Sheng W, Xiao L, Mao Z. An automated fault injection technique based on VHDL syntax analysis and stratified sampling. In Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008. 2008. p. 587-591. 4459618. (Proceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008). doi: 10.1109/DELTA.2008.36

An automated fault injection technique based on VHDL syntax analysis and stratified sampling

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