Abstract
This paper presents a multiplexed analog-To-digital converter (ADC) consisting mainly of high-precision sampling holders (S/H) and an incremental zoom ADC. Flip-Around design is employed in S/H modules for power economy and noise suppression. Based on efficient coordination between S/H and multiplexers, synchronous sampling is available in the whole triple-channel ADC to maintain phase accordance. The core converter employed a hybrid architecture of successive approximation register (SAR) and Sigma-Delta (ς"), which constitutes an energy-efficient zoom ADC. Final conversion result is a combination of the two steps. Both the SAR and ς" modulation share a third-order loop filter to compromise between systematic stability and input range. On-chip digital logic include capacitor array controlling and dynamic-element-matching (DEM) technique. Manufactured in a standard 0.35μm CMOS technology, the whole chip occupies an area of 2.7 mm2. Experimental results show a maximum signal-To-noise ratio (SNR) of 100.2 dB, with a power consumption of 2.1 mW from a 5 V supply.
| Original language | English |
|---|---|
| Article number | 2050136 |
| Journal | Modern Physics Letters B |
| Volume | 34 |
| Issue number | 13 |
| DOIs | |
| State | Published - 10 May 2020 |
Keywords
- 3-DoF gyroscopes
- Data conversion
- incremental zoom ADC
- sampling holders
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