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A SEU test and simulation method for Zynq BRAM and flip-flops

  • Ji Yao
  • , Wang Shaojun
  • , Ma Ning
  • , Peng Yu
  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Zynq is designed to provide higher overall system performance and programmable flexibility at lower power consumption, which is consistent with the trend of commercial small satellite computers. Although modern commercial Zynq chips offer those aforementioned advantages, On-Chip Block RAM(BRAM) and flip-flops(FF) are susceptible to Single Event Upsets(SEU) in space application. We proposed built-in self-test circuits to test the SEU cross sections of BRAM and FF based on the analysis of the basic structure and application requirements of Zynq. To verify the validity of the self-test circuits, the fault injectors are designed to simulate the SEU at any position in any BRAM and each FF. The design can be used for space-borne and ground heavy ion test of Zynq chips.

Original languageEnglish
Title of host publicationICEMI 2017 - Proceedings of IEEE 13th International Conference on Electronic Measurement and Instruments
EditorsWu Juan, Yin Jiali, Zhang Qi
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-5
Number of pages5
ISBN (Electronic)9781509050345
DOIs
StatePublished - 2 Jul 2017
Event13th IEEE International Conference on Electronic Measurement and Instruments, ICEMI 2017 - Yangzhou, China
Duration: 20 Oct 201722 Oct 2017

Publication series

NameICEMI 2017 - Proceedings of IEEE 13th International Conference on Electronic Measurement and Instruments
Volume2018-January

Conference

Conference13th IEEE International Conference on Electronic Measurement and Instruments, ICEMI 2017
Country/TerritoryChina
CityYangzhou
Period20/10/1722/10/17

Keywords

  • Fault injection
  • SEU
  • Test method
  • Zynq

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