Abstract
Discrete silicon carbide (SiC) MOSFETs are often connected in parallel to reach high current capabilities. However, the unequal switching losses and transient current overshoots can limit the maximum switching frequency and current capability of the paralleled unit. In this paper, a paralleled half-bridge unit with the distributed arrangement of dc capacitors and the auxiliary gate-source connections is presented. The layout mismatches are analyzed and optimized by the AnsysEM simulation techniques. Compared to the traditional paralleled unit, the differences in the transient current overshoots for the low-side paralleled SiC MOSFETs are decreased significantly from 14.37 % to 2.78 %.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 15th IEEE Conference on Industrial Electronics and Applications, ICIEA 2020 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 657-662 |
| Number of pages | 6 |
| ISBN (Electronic) | 9781728151694 |
| DOIs | |
| State | Published - 9 Nov 2020 |
| Event | 15th IEEE Conference on Industrial Electronics and Applications, ICIEA 2020 - Virtual, Kristiansand, Norway Duration: 9 Nov 2020 → 13 Nov 2020 |
Publication series
| Name | Proceedings of the 15th IEEE Conference on Industrial Electronics and Applications, ICIEA 2020 |
|---|
Conference
| Conference | 15th IEEE Conference on Industrial Electronics and Applications, ICIEA 2020 |
|---|---|
| Country/Territory | Norway |
| City | Virtual, Kristiansand |
| Period | 9/11/20 → 13/11/20 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- parallel connection
- silicon carbide (SiC)
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