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A novel oscillation-based BIST for ADCs

  • Yong Sheng Wang*
  • , Jian Ling Zhang
  • , Ming Yan Yu
  • , Li Yi Xiao
  • *Corresponding author for this work
  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

An oscillation based BIST scheme for ADCs was proposed. A novel technique was used to timing output codes of ADCs by digital mode. In the BIST structure, the test signal was controlled by the feedback circuit to oscillate between two transition edges of ADCs. The rising and falling time of the test signal during oscillation period was in direct proportion to the code width of ADCs under testing. By timing the rising or falling time and comparing it with an ideal time, the offset error, Differential Non-Linearity (DNL), Integral Non-Linearity (INL) and gain error can be achieved.

Original languageEnglish
Title of host publicationASICON 2007 - 2007 7th International Conference on ASIC Proceeding
Pages1010-1013
Number of pages4
DOIs
StatePublished - 2007
Event2007 7th International Conference on ASIC, ASICON 2007 - Guilin, China
Duration: 26 Oct 200729 Oct 2007

Publication series

NameASICON 2007 - 2007 7th International Conference on ASIC Proceeding

Conference

Conference2007 7th International Conference on ASIC, ASICON 2007
Country/TerritoryChina
CityGuilin
Period26/10/0729/10/07

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