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A new PLL based on fast positive and negative sequence decomposition algorithm with matrix operation under distorted grid conditions

  • School of Electrical Engineering and Automation, Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper investigates and presents a new phase locked loop (PLL) based on fast positive and negative sequence decomposition algorithm with matrix operation under distorted grid conditions. In renewable energy integration filed, some information of unbalanced and distorted grid voltages, such as frequency and phase angle of fundamental wave, should be exactly and quickly detected for reliable operation. Due to the unfavorable transient response and very poor phase angle tracking of PLL based on the positive and negative sequence components decomposition with a quarter cycle delayed α variable and β variable in a stationary α-β reference frame under distorted grid conditions, a fast and exact PLL method by matrix operation of α variable and β variable of grid voltage is proposed. This process is achieved by transforming the positive, negative and low-order harmonics into multiple synchronous reference frames, and then by a matrix operation, the frequency and phase information are extracted. Thus the positive and negative sequences are separated after 5 sampling periods. The paper presents a detailed description and derivation of the proposed PLL method. Simulations and experimental results based on digital signal processor chip TMS320F2812 verify and validate the excellent performance of the new PLL method.

Original languageEnglish
Title of host publication2014 International Power Electronics Conference, IPEC-Hiroshima - ECCE Asia 2014
PublisherIEEE Computer Society
Pages3213-3217
Number of pages5
ISBN (Print)9781479927050
DOIs
StatePublished - 2014
Externally publishedYes
Event7th International Power Electronics Conference, IPEC-Hiroshima - ECCE Asia 2014 - Hiroshima, Japan
Duration: 18 May 201421 May 2014

Publication series

Name2014 International Power Electronics Conference, IPEC-Hiroshima - ECCE Asia 2014

Conference

Conference7th International Power Electronics Conference, IPEC-Hiroshima - ECCE Asia 2014
Country/TerritoryJapan
CityHiroshima
Period18/05/1421/05/14

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

Keywords

  • matrix operation
  • phase locked loop
  • positive and negative sequence decomposition algorithm
  • unbalanced and distorted grid conditions

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