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A method to estimate cross-section of circuits at RTL levels

  • Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposed a method to estimate cross-section of circuits at RTL level design. By combination of the intrinsic cross-section which was obtain from Monte-Carlo simulation with the results obtained from fault injection, the method can provide systematic dynamic cross-section of the design. It can be an alternative method instead of ground radiation test to get cross section. The DDC IP Core has been simulated for test. The results showed that dynamic cross-section is smaller than static cross-section in certain application. The saturated dynamic cross-section of it is about 5e-3 cm2/device.

Original languageEnglish
Title of host publicationProceedings - 2017 IEEE 12th International Conference on ASIC, ASICON 2017
EditorsYajie Qin, Zhiliang Hong, Ting-Ao Tang
PublisherIEEE Computer Society
Pages363-366
Number of pages4
ISBN (Electronic)9781509066247
DOIs
StatePublished - 1 Jul 2017
Event12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017 - Guiyang, China
Duration: 25 Oct 201728 Oct 2017

Publication series

NameProceedings of International Conference on ASIC
Volume2017-October
ISSN (Print)2162-7541
ISSN (Electronic)2162-755X

Conference

Conference12th IEEE International Conference on Advanced Semiconductor Integrated Circuits, ASICON 2017
Country/TerritoryChina
CityGuiyang
Period25/10/1728/10/17

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