Abstract
This article proposed an innovative single-edge space vector pulse width modulation (SVPWM) strategy for the three-level three-phase voltage source inverters (VSIs), which could suppress the harmonics around pulsewidth modulation (PWM) frequency. The technical principle and phase voltage harmonic formula of the conventional three-level single-edge SVPWM are illustrated and analyzed based on research of the working principle in the diode-clamped three-level inverter. To optimize the vector synthesis order of conventional single-edge regular sampling SVPWM technology, a novel zero-vector switching SVPWM (ZSSVPWM) technology is proposed. The technical principle and implementation process of this proposed three-level ZSSVPWM are discussed and analyzed in detail. Finally, simulation and experimental results verified its suppression effect on the PWM harmonics and compared the harmonic characteristics of this strategy with different modulation ratios.
| Original language | English |
|---|---|
| Pages (from-to) | 1482-1491 |
| Number of pages | 10 |
| Journal | IEEE Journal of Emerging and Selected Topics in Power Electronics |
| Volume | 13 |
| Issue number | 2 |
| DOIs | |
| State | Published - 2025 |
| Externally published | Yes |
Keywords
- Harmonics suppression
- motor drive
- switching losses
- three-level SVPWM
- three-level inverter
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