A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current

Pengrui Fu; Chaoyu Zhang; Chengming Zhang; Liyi Li

doi:10.1109/CIEEC69682.2026.11572061

A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current

Pengrui Fu^*
, Chaoyu Zhang
, Chengming Zhang
, Liyi Li

^*Corresponding author for this work

School of Electrical Engineering and Automation, Harbin Institute of Technology
School of Robotics and Advanced Manufacture, Harbin Institute of Technology Shenzhen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The voltage source inverters (VSI) are widely used in motor drivers. As one of the most primary components in the VSI, the DC-link capacitor is vitally important in terms of reliability. Reducing the capacitor current is widely considered an effective method to improve its reliability. For this purpose, the existing pulse width modulation (PWM) technique is improved by introducing the individual switching frequency for each phase. A hybrid frequency PWM method is proposed in this study, taking account of the impedance characteristics of the DC-side circuit in two-level VSI. Simulation results show that, in scenarios using small-capacitance capacitors or low-impedance bus cables, the proposed method can achieve a smaller capacitor current at the same equivalent switching frequency.

Original language	English
Title of host publication	Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	3451-3455
Number of pages	5
ISBN (Electronic)	9798331549558
DOIs	https://doi.org/10.1109/CIEEC69682.2026.11572061
State	Published - 2026
Externally published	Yes
Event	9th International Electrical and Energy Conference, CIEEC 2026 - Tianjin, China Duration: 15 May 2026 → 17 May 2026

Publication series

Name	Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026

Conference

Conference	9th International Electrical and Energy Conference, CIEEC 2026
Country/Territory	China
City	Tianjin
Period	15/05/26 → 17/05/26

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

DC-link capacitor current
pulse width modulation
two-level voltage source inverter

Access to Document

10.1109/CIEEC69682.2026.11572061

Cite this

Fu, P., Zhang, C., Zhang, C., & Li, L. (2026). A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current. In Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026 (pp. 3451-3455). (Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CIEEC69682.2026.11572061

Fu, Pengrui ; Zhang, Chaoyu ; Zhang, Chengming et al. / A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current. Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026. Institute of Electrical and Electronics Engineers Inc., 2026. pp. 3451-3455 (Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026).

@inproceedings{4bdb347311804c75a0df655cdbb17308,

title = "A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current",

abstract = "The voltage source inverters (VSI) are widely used in motor drivers. As one of the most primary components in the VSI, the DC-link capacitor is vitally important in terms of reliability. Reducing the capacitor current is widely considered an effective method to improve its reliability. For this purpose, the existing pulse width modulation (PWM) technique is improved by introducing the individual switching frequency for each phase. A hybrid frequency PWM method is proposed in this study, taking account of the impedance characteristics of the DC-side circuit in two-level VSI. Simulation results show that, in scenarios using small-capacitance capacitors or low-impedance bus cables, the proposed method can achieve a smaller capacitor current at the same equivalent switching frequency.",

keywords = "DC-link capacitor current, pulse width modulation, two-level voltage source inverter",

author = "Pengrui Fu and Chaoyu Zhang and Chengming Zhang and Liyi Li",

note = "Publisher Copyright: {\textcopyright} 2026 IEEE.; 9th International Electrical and Energy Conference, CIEEC 2026 ; Conference date: 15-05-2026 Through 17-05-2026",

year = "2026",

doi = "10.1109/CIEEC69682.2026.11572061",

language = "英语",

series = "Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "3451--3455",

booktitle = "Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026",

address = "美国",

}

Fu, P, Zhang, C , Zhang, C & Li, L 2026, A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current. in Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026. Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026, Institute of Electrical and Electronics Engineers Inc., pp. 3451-3455, 9th International Electrical and Energy Conference, CIEEC 2026, Tianjin, China, 15/05/26. https://doi.org/10.1109/CIEEC69682.2026.11572061

A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current. / Fu, Pengrui; Zhang, Chaoyu ; Zhang, Chengming et al.
Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026. Institute of Electrical and Electronics Engineers Inc., 2026. p. 3451-3455 (Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current

AU - Fu, Pengrui

AU - Zhang, Chaoyu

AU - Zhang, Chengming

AU - Li, Liyi

PY - 2026

Y1 - 2026

N2 - The voltage source inverters (VSI) are widely used in motor drivers. As one of the most primary components in the VSI, the DC-link capacitor is vitally important in terms of reliability. Reducing the capacitor current is widely considered an effective method to improve its reliability. For this purpose, the existing pulse width modulation (PWM) technique is improved by introducing the individual switching frequency for each phase. A hybrid frequency PWM method is proposed in this study, taking account of the impedance characteristics of the DC-side circuit in two-level VSI. Simulation results show that, in scenarios using small-capacitance capacitors or low-impedance bus cables, the proposed method can achieve a smaller capacitor current at the same equivalent switching frequency.

AB - The voltage source inverters (VSI) are widely used in motor drivers. As one of the most primary components in the VSI, the DC-link capacitor is vitally important in terms of reliability. Reducing the capacitor current is widely considered an effective method to improve its reliability. For this purpose, the existing pulse width modulation (PWM) technique is improved by introducing the individual switching frequency for each phase. A hybrid frequency PWM method is proposed in this study, taking account of the impedance characteristics of the DC-side circuit in two-level VSI. Simulation results show that, in scenarios using small-capacitance capacitors or low-impedance bus cables, the proposed method can achieve a smaller capacitor current at the same equivalent switching frequency.

KW - DC-link capacitor current

KW - pulse width modulation

KW - two-level voltage source inverter

UR - https://www.scopus.com/pages/publications/105044605755

U2 - 10.1109/CIEEC69682.2026.11572061

DO - 10.1109/CIEEC69682.2026.11572061

M3 - 会议稿件

AN - SCOPUS:105044605755

T3 - Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026

SP - 3451

EP - 3455

BT - Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 9th International Electrical and Energy Conference, CIEEC 2026

Y2 - 15 May 2026 through 17 May 2026

ER -

Fu P, Zhang C , Zhang C, Li L. A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current. In Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026. Institute of Electrical and Electronics Engineers Inc. 2026. p. 3451-3455. (Proceedings of 2026 IEEE 9th International Electrical and Energy Conference, CIEEC 2026). doi: 10.1109/CIEEC69682.2026.11572061

A Hybrid Frequency PWM Technique for Reducing DC-Link Capacitor Current

Abstract

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UN SDGs

Keywords

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