A highly integrated joint servo system based on FPGA with nios II processor

F. L. Ni; M. H. Jin; Z. W. Xie; Sh C. Shi; Y. Ch Liu; H. Liu; G. Hirzinger

doi:10.1109/ICMA.2006.257757

A highly integrated joint servo system based on FPGA with nios II processor

F. L. Ni^*
, M. H. Jin
, Z. W. Xie
, Sh C. Shi
, Y. Ch Liu
, H. Liu
, G. Hirzinger

^*Corresponding author for this work

School of Mechatronics Engineering

Harbin Institute of Technology
German Aerospace Center

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

Abstract

In this paper, FPGA (Field Programmable Gate Array) based joint servo system for the HIT/DLR arm has been investigated. A new fully digitized hardware design scheme of a joint servo controller has been presented, which is verified and implemented on one-chip FPGA with embedded NIOS II processor. This scheme not only realizes all sensor data acquisition, SPWM generation and motor vector control, but also realizes joint position, torque control and trajectory generation. Moreover, the realized controller IC also contains a high speed serial (ISMbps) communication interface based on LVDS (low voltage differential signal), which permits the on-line configuration for all kinds of control parameters. Experimental results demonstrate the effectiveness of the compact joint servo controller for the HIT/DLR arm.

Original language	English
Title of host publication	2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006
Pages	973-978
Number of pages	6
DOIs	https://doi.org/10.1109/ICMA.2006.257757
State	Published - 2006
Event	2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006 - Luoyang, China Duration: 25 Jun 2006 → 28 Jun 2006

Publication series

Name	2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006
Volume	2006

Conference

Conference	2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006
Country/Territory	China
City	Luoyang
Period	25/06/06 → 28/06/06

Keywords

FPGA
Joint servo system
Motion control
NIOS II processor

Access to Document

10.1109/ICMA.2006.257757

Cite this

Ni, F. L., Jin, M. H., Xie, Z. W., Shi, S. C., Liu, Y. C., Liu, H., & Hirzinger, G. (2006). A highly integrated joint servo system based on FPGA with nios II processor. In 2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006 (pp. 973-978). Article 4026217 (2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006; Vol. 2006). https://doi.org/10.1109/ICMA.2006.257757

@inproceedings{f2e32d424a8f48d7857de8ae146414f3,

title = "A highly integrated joint servo system based on FPGA with nios II processor",

abstract = "In this paper, FPGA (Field Programmable Gate Array) based joint servo system for the HIT/DLR arm has been investigated. A new fully digitized hardware design scheme of a joint servo controller has been presented, which is verified and implemented on one-chip FPGA with embedded NIOS II processor. This scheme not only realizes all sensor data acquisition, SPWM generation and motor vector control, but also realizes joint position, torque control and trajectory generation. Moreover, the realized controller IC also contains a high speed serial (ISMbps) communication interface based on LVDS (low voltage differential signal), which permits the on-line configuration for all kinds of control parameters. Experimental results demonstrate the effectiveness of the compact joint servo controller for the HIT/DLR arm.",

keywords = "FPGA, Joint servo system, Motion control, NIOS II processor",

author = "Ni, \{F. L.\} and Jin, \{M. H.\} and Xie, \{Z. W.\} and Shi, \{Sh C.\} and Liu, \{Y. Ch\} and H. Liu and G. Hirzinger",

year = "2006",

doi = "10.1109/ICMA.2006.257757",

language = "英语",

isbn = "1424404665",

series = "2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006",

pages = "973--978",

booktitle = "2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006",

note = "2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006 ; Conference date: 25-06-2006 Through 28-06-2006",

}

Ni, FL , Jin, MH , Xie, ZW , Shi, SC, Liu, YC, Liu, H & Hirzinger, G 2006, A highly integrated joint servo system based on FPGA with nios II processor. in 2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006., 4026217, 2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006, vol. 2006, pp. 973-978, 2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006, Luoyang, China, 25/06/06. https://doi.org/10.1109/ICMA.2006.257757

A highly integrated joint servo system based on FPGA with nios II processor. / Ni, F. L.; Jin, M. H.; Xie, Z. W. et al.
2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006. 2006. p. 973-978 4026217 (2006 IEEE International Conference on Mechatronics and Automation, ICMA 2006; Vol. 2006).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ni, F. L.

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AU - Xie, Z. W.

AU - Shi, Sh C.

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AU - Liu, H.

AU - Hirzinger, G.

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N2 - In this paper, FPGA (Field Programmable Gate Array) based joint servo system for the HIT/DLR arm has been investigated. A new fully digitized hardware design scheme of a joint servo controller has been presented, which is verified and implemented on one-chip FPGA with embedded NIOS II processor. This scheme not only realizes all sensor data acquisition, SPWM generation and motor vector control, but also realizes joint position, torque control and trajectory generation. Moreover, the realized controller IC also contains a high speed serial (ISMbps) communication interface based on LVDS (low voltage differential signal), which permits the on-line configuration for all kinds of control parameters. Experimental results demonstrate the effectiveness of the compact joint servo controller for the HIT/DLR arm.

AB - In this paper, FPGA (Field Programmable Gate Array) based joint servo system for the HIT/DLR arm has been investigated. A new fully digitized hardware design scheme of a joint servo controller has been presented, which is verified and implemented on one-chip FPGA with embedded NIOS II processor. This scheme not only realizes all sensor data acquisition, SPWM generation and motor vector control, but also realizes joint position, torque control and trajectory generation. Moreover, the realized controller IC also contains a high speed serial (ISMbps) communication interface based on LVDS (low voltage differential signal), which permits the on-line configuration for all kinds of control parameters. Experimental results demonstrate the effectiveness of the compact joint servo controller for the HIT/DLR arm.

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KW - Motion control

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ER -

A highly integrated joint servo system based on FPGA with nios II processor

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