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A high performance FFT library with single instruction multiple data (SIMD) architecture

  • Xu Wang*
  • , Yan Zhang
  • , Shunying Ding
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Fast Fourier Transform (FFT) is the basis of Digital Signal Processing (DSP). In this paper, a high performance FFT library using radix-2 decimation in frequency (DIF) algorithm is presented which is well suited for SIMD architecture. SIMD architecture microprocessors, such as Intel and AMD, allow parallel floating point operations on contiguous data in memory. A 128-point FFT based radix-2 DIF algorithm is implemented on the Intel architecture. All arithmetic operations in FFT are optimized by SSE assembly. Twiddle factors and binary reverse array are also optimized for SIMD architecture. The library is implemented using C and Intel Streaming SIMD Extensions (SSE) assembly instructions. The performance comparison with Fastest Fourier Transform in the West (FFTW) library shows that the proposed FFT library is faster.

Original languageEnglish
Title of host publication2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings
PublisherIEEE Computer Society
Pages630-633
Number of pages4
ISBN (Print)9781457703218
DOIs
StatePublished - 2011
Externally publishedYes
Event2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Ningbo, China
Duration: 9 Sep 201111 Sep 2011

Publication series

Name2011 International Conference on Electronics, Communications and Control, ICECC 2011 - Proceedings

Conference

Conference2011 International Conference on Electronics, Communications and Control, ICECC 2011
Country/TerritoryChina
CityNingbo
Period9/09/1111/09/11

Keywords

  • FFT
  • IFFT
  • SIMD
  • SSE

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