TY - GEN
T1 - A hardware-software co-design experiments platform for NAND flash based on Zynq
AU - Wei, Debao
AU - Gong, Youhua
AU - Qiao, Liyan
AU - Deng, Libao
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2014/9/25
Y1 - 2014/9/25
N2 - In this paper we describe a hardware-software co-design experiments platform for NAND flash based on Zynq. Our novel experimental platform utilizes the PL (Programmable Logic within Zynq) to achieve the timing control and bad block management of NAND flash, and to provide a high-speed parallel algorithm verification environment for users. Besides, it utilizes the PS (Processing System within the Zynq) to achieve the famous hybrid FAST FTL algorithm, so it can also provide a valuation baseline of FTL algorithms, and provide the running environment for compute-intensive data processing algorithms, like compression or error correction. Test results show that our experiment platform has a high speed and stable performance to manage the storage data, and can effectively evaluate the indicators of storage system based on NAND flash.
AB - In this paper we describe a hardware-software co-design experiments platform for NAND flash based on Zynq. Our novel experimental platform utilizes the PL (Programmable Logic within Zynq) to achieve the timing control and bad block management of NAND flash, and to provide a high-speed parallel algorithm verification environment for users. Besides, it utilizes the PS (Processing System within the Zynq) to achieve the famous hybrid FAST FTL algorithm, so it can also provide a valuation baseline of FTL algorithms, and provide the running environment for compute-intensive data processing algorithms, like compression or error correction. Test results show that our experiment platform has a high speed and stable performance to manage the storage data, and can effectively evaluate the indicators of storage system based on NAND flash.
KW - NAND flash
KW - Zynq
KW - experiments platform
KW - hardware-software co-design
UR - https://www.scopus.com/pages/publications/84908637353
U2 - 10.1109/RTCSA.2014.6910555
DO - 10.1109/RTCSA.2014.6910555
M3 - 会议稿件
AN - SCOPUS:84908637353
T3 - RTCSA 2014 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
BT - RTCSA 2014 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 20th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2014
Y2 - 20 August 2014 through 22 August 2014
ER -