A FPGA based real-time design of efficient sifting module in QKD system

Li Qiong; Xiong Shaojin; Le Dan; Lin Zhibin; Liu Hucheng

doi:10.1109/IC2E.2014.22

A FPGA based real-time design of efficient sifting module in QKD system

Li Qiong^*
, Xiong Shaojin
, Le Dan
, Lin Zhibin
, Liu Hucheng

^*Corresponding author for this work

Faculty of Computing

Harbin Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

Since the Quantum Key Distribution (QKD)technique makes it possible to construct an absolute secure cryptographic system by combing the One-time pad, QKD has drawn many attention these years. The insufficient implementation speed of the post-processing system of QKD is one of the greatest obstacle to wide application of QKD. The sifting module of QKD post-processing system needs to deal with the heaviest incoming load, it is of crucial importance to study how to design and implement an efficient sifting module to accelerate the QKD post-processing system. In this paper, an efficient FPGA based design scheme of the sifting module is presented. Our scheme can decrease the demands for storage resource and communication traffic obviously.

Original language	English
Title of host publication	Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	514-519
Number of pages	6
ISBN (Electronic)	9781479937660
DOIs	https://doi.org/10.1109/IC2E.2014.22
State	Published - 18 Sep 2014
Event	2nd IEEE International Conference on Cloud Engineering, IC2E 2014 - Boston, United States Duration: 10 Mar 2014 → 14 Mar 2014

Publication series

Name	Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014

Conference

Conference	2nd IEEE International Conference on Cloud Engineering, IC2E 2014
Country/Territory	United States
City	Boston
Period	10/03/14 → 14/03/14

Keywords

QKD
run-length coding
sifting

Access to Document

10.1109/IC2E.2014.22

Cite this

Qiong, L., Shaojin, X., Dan, L., Zhibin, L., & Hucheng, L. (2014). A FPGA based real-time design of efficient sifting module in QKD system. In Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014 (pp. 514-519). Article 6903521 (Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IC2E.2014.22

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title = "A FPGA based real-time design of efficient sifting module in QKD system",

abstract = "Since the Quantum Key Distribution (QKD)technique makes it possible to construct an absolute secure cryptographic system by combing the One-time pad, QKD has drawn many attention these years. The insufficient implementation speed of the post-processing system of QKD is one of the greatest obstacle to wide application of QKD. The sifting module of QKD post-processing system needs to deal with the heaviest incoming load, it is of crucial importance to study how to design and implement an efficient sifting module to accelerate the QKD post-processing system. In this paper, an efficient FPGA based design scheme of the sifting module is presented. Our scheme can decrease the demands for storage resource and communication traffic obviously.",

keywords = "QKD, run-length coding, sifting",

author = "Li Qiong and Xiong Shaojin and Le Dan and Lin Zhibin and Liu Hucheng",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2nd IEEE International Conference on Cloud Engineering, IC2E 2014 ; Conference date: 10-03-2014 Through 14-03-2014",

year = "2014",

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Qiong, L, Shaojin, X, Dan, L, Zhibin, L & Hucheng, L 2014, A FPGA based real-time design of efficient sifting module in QKD system. in Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014., 6903521, Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014, Institute of Electrical and Electronics Engineers Inc., pp. 514-519, 2nd IEEE International Conference on Cloud Engineering, IC2E 2014, Boston, United States, 10/03/14. https://doi.org/10.1109/IC2E.2014.22

A FPGA based real-time design of efficient sifting module in QKD system. / Qiong, Li; Shaojin, Xiong; Dan, Le et al.
Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 514-519 6903521 (Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Qiong, Li

AU - Shaojin, Xiong

AU - Dan, Le

AU - Zhibin, Lin

AU - Hucheng, Liu

PY - 2014/9/18

Y1 - 2014/9/18

N2 - Since the Quantum Key Distribution (QKD)technique makes it possible to construct an absolute secure cryptographic system by combing the One-time pad, QKD has drawn many attention these years. The insufficient implementation speed of the post-processing system of QKD is one of the greatest obstacle to wide application of QKD. The sifting module of QKD post-processing system needs to deal with the heaviest incoming load, it is of crucial importance to study how to design and implement an efficient sifting module to accelerate the QKD post-processing system. In this paper, an efficient FPGA based design scheme of the sifting module is presented. Our scheme can decrease the demands for storage resource and communication traffic obviously.

AB - Since the Quantum Key Distribution (QKD)technique makes it possible to construct an absolute secure cryptographic system by combing the One-time pad, QKD has drawn many attention these years. The insufficient implementation speed of the post-processing system of QKD is one of the greatest obstacle to wide application of QKD. The sifting module of QKD post-processing system needs to deal with the heaviest incoming load, it is of crucial importance to study how to design and implement an efficient sifting module to accelerate the QKD post-processing system. In this paper, an efficient FPGA based design scheme of the sifting module is presented. Our scheme can decrease the demands for storage resource and communication traffic obviously.

KW - QKD

KW - run-length coding

KW - sifting

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Qiong L, Shaojin X, Dan L, Zhibin L, Hucheng L. A FPGA based real-time design of efficient sifting module in QKD system. In Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 514-519. 6903521. (Proceedings - 2014 IEEE International Conference on Cloud Engineering, IC2E 2014). doi: 10.1109/IC2E.2014.22

A FPGA based real-time design of efficient sifting module in QKD system

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