全桥型MMC数字-物理混合仿真阻尼阻抗接口模型

Power hardware-in-the-loop (PHIL) simulation combines the advantages of digital simulation and physical experiment, which brings convenience to the theoretical research and engineering design of complex power electronic equipment. However, the existence of the digital-physical interface may cause low precision of PHIL simulation and even lead to instability. In order to solve the problem, based on the traditional damping impedance interface model, this paper proposes a design method of interface compensation impedance for the full-bridge modular multilevel converter (MMC) applied to the flexible DC transmission. Firstly, the effects of the delay introduced by interface and the disturbance on system stability and accuracy are comprehensively considered. According to the operation characteristics of MMC, a simple structure of series RLC compensation impedance is designed, which can guarantee system stability and high accuracy under different operation conditions. Furthermore, an experimental platform of DC back-to-back PHIL simulation based on full-bridge MMC is built, and the voltage drop, short-circuit faults, etc. are simulated in the digital side while the fault ride-through process of a full-bridge MMC is realized in the physical side. The experimental results show that the proposed design method of interface compensation impedance guarantees the system effectiveness under various operation conditions.